Messages in this thread | | | Date | Fri, 23 Jun 2017 15:56:07 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH v6 0/3] Cavium ARM64 uncore PMU support |
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On Fri, Jun 23, 2017 at 03:01:25PM +0200, Jan Glauber wrote: > Add support for various PMU counters found on the Cavium ThunderX and > OcteonTx SoC. > > The driver provides common "uncore" functions to avoid code duplication and > support adding more device PMUs (like L2 cache) in the future. > > Probe and removal of the PMUs is done by hooking into the ThunderX EDAC > driver as this driver owns all the PCI devices containing the PMU counters.
... which is a very bad idea, of course. EDAC doesn't have anything to do with performance measurements.
And I don't see why the EDAC driver should own any PCI devices - EDAC simply uses them like anything else in the kernel so the PMU functionality can simply use them too, independent from EDAC.
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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