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SubjectRe: [PATCH 0/3] x86: TSC_DEADLINE vs TSC_ADJUST and microcode revisions
On Wed, 31 May 2017, Peter Zijlstra wrote:
> These patches rely on the latest microcode data files from Intel [*]
>
> Without this microcode loaded, we'll print a FW_BUG informing the user to
> update their microcode image and disable TSC_DEADLINE support.
>
> This in turn allows us to remove the TSC_ADJUST workarounds which were required
> due to errata.

Thanks!

On a related note, maybe it would be possible to do something about
SKL150/SKX150/KBL095 as well?

Working around that errata requires disabling hyperthreads on Skylake
when microcode < 0xb9 (confirmed to fix the issue by users suffering
from SKL150), and for Kabylake, disable hyperthreading when microcode <
0x5d (personal best guess based on microcode release date -- someone
@intel might want to confirm it).

--
Henrique Holschuh

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