lkml.org 
[lkml]   [2017]   [May]   [26]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
SubjectRe: [PATCH 7/7] DWARF: add the config option
From
Date
On 05/26/2017, 08:54 AM, Jiri Slaby wrote:
> On 05/19/2017, 11:35 PM, Josh Poimboeuf wrote:
>> https://github.com/jpoimboe/linux/blob/undwarf/arch/x86/kernel/unwind_undwarf.c
>
> JFYI, it crashes in sha1_transform_avx due to crypto changes. You
> perhaps missed that this beast uses ebp (not rbp) register for
> computations. I had to do:
>
> --- a/arch/x86/crypto/sha1_ssse3_asm.S
> +++ b/arch/x86/crypto/sha1_ssse3_asm.S
> @@ -37,7 +37,7 @@
> #define REG_A %ecx
> #define REG_B %esi
> #define REG_C %edi
> -#define REG_D %ebp
> +#define REG_D %r12d
> #define REG_E %edx
>
> #define REG_T1 %eax
> @@ -74,6 +74,7 @@
> SYM_FUNC_START(\name)
>
> push %rbx
> + push %r12
> push %rbp
>
> mov %rsp, %rbp
> @@ -99,6 +100,7 @@
> rep stosq
>
> leaveq # deallocate workspace
> + pop %r12
> pop %rbx
> ret
>
>
> I am afraid there are more of these, e.g. in aesni-intel_asm.S.

aesni-intel_asm.S is OK -- only untouched x86_32 part uses ebp.

But sha1_avx2_x86_64_asm.S is not. They use *all* usable registers
including ebp in the computations hidden behind the
SHA1_PIPELINED_MAIN_BODY macro. The only work around I can see is to
push rbp/pop rbp around the computation as it used to do with rbx:

--- a/arch/x86/crypto/sha1_avx2_x86_64_asm.S
+++ b/arch/x86/crypto/sha1_avx2_x86_64_asm.S
@@ -636,6 +636,7 @@ _loop3:
/* Align stack */
mov %rsp, %rbp
and $~(0x20-1), %rsp
+ push %rbp
sub $RESERVE_STACK, %rsp

avx2_zeroupper
@@ -661,6 +662,7 @@ _loop3:
avx2_zeroupper

add $RESERVE_STACK, %rsp
+ pop %rbp

leaveq
pop %r15
regards,
--
js
suse labs

\
 
 \ /
  Last update: 2017-05-26 13:32    [W:0.379 / U:0.028 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site