Messages in this thread | | | Date | Sun, 21 May 2017 07:35:21 +0200 | From | Lukas Wunner <> | Subject | Re: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the switch structure |
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On Sun, May 21, 2017 at 05:29:47AM +0000, Levy, Amir (Jer) wrote: > On Sun, May 21 2017, 07:47 AM, Lukas Wunner wrote: > > On Thu, May 18, 2017 at 05:39:08PM +0300, Mika Westerberg wrote: > > > + > > > + default: > > > + sw->generation = 1; > > > + break; > > > > If someone adds an entry for, say, a new TB3 controller to nhi_ids[] but > > forgets to update this function, the controller is assigned the wrong > > generation number. It might be better to make TB3 the default and list > > each TB1 controller instead since it's less likely for Intel to introduce > > an older gen chip. > > > > Generally I think it's problematic to require that multiple files are > > touched whenever a new controller is added. Isn't the generation number > > or link speed (10/20/40) stored in some register in PCI config space > > (VSEC 0x1234) or TB config space? > > How about setting information, that isn't available from PCI, in > pci_device_id.driver_data when initializing nhi_ids[]?
Right, that would also be possible, though reading the generation number from a register would be more elegant, if such a register exists.
Thanks,
Lukas
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