Messages in this thread | | | Subject | Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite | From | Benjamin Herrenschmidt <> | Date | Fri, 19 May 2017 20:30:06 +1000 |
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On Mon, 2017-05-15 at 16:07 +0300, Ivan Mikhaylov wrote: > +#ifdef CONFIG_FSP2 > + /* > + * Prevent a kernel panic caused by unintentionally clearing TCR > + * watchdog bits. At this point in the kernel boot, the watchdog has > + * already been enabled by u-boot. The original code's attempt to > + * write to the TCR register results in an inadvertent clearing of the > + * watchdog configuration bits, causing the 440 to reset. > + */ > + tcr = mfspr(SPRN_TCR); > + tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */ > + tcr |= TCR_DIE; /* enable decrementer */ > + mtspr(SPRN_TCR, tcr); > +#else
This should be a runtime test, not a compile time option.
Cheers, Ben.
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