Messages in this thread | | | Date | Fri, 07 Apr 2017 22:54:19 +0100 | From | Ben Dooks <> | Subject | Re: [PATCH 1/1] memory: tegra: fix fdc test bug |
| |
On 2017-04-07 18:43, Thierry Reding wrote: > On Fri, Apr 07, 2017 at 06:28:20PM +0100, Ben Dooks wrote: >> The fdc variable is a bool, taking the address of this will generally >> produce true, thus skewing any users of the >> tegra_mc_set_latency_allowance >> code. >> >> Note, this does not seem to be producing a compiler warning. This was >> only >> spotted as it meant a caller was seeing 3 times higher than expected >> register results. >> >> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> >> --- >> drivers/memory/tegra/mc.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > What tree is this based on? I don't see this code anywhere in mainline.
Apologies, turns out this a vendor added function.
-- Ben
| |