Messages in this thread | | | Date | Wed, 8 Mar 2017 04:27:26 -0800 | From | "Raj, Ashok" <> | Subject | Re: [PATCH] pciehp: Fix race condition handling surprise link-down |
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On Mon, Mar 06, 2017 at 06:24:17PM -0600, Bjorn Helgaas wrote: > On Fri, Feb 03, 2017 at 10:51:04AM -0600, Bjorn Helgaas wrote: > > Hi Ashok, > > Just a ping to make sure we're not deadlocked. I'm waiting for you, > so I hope you're not also waiting for me :) I'm not trying to rush you; > I just don't want to drop this by mistake. > Hi Bjorn
no we aren't deadlocked :-). I didn't get around changing it to ordered queue yet, mostly worried about having to retest all the different combinations with ATTN, POWER_CTL, SLD.
I'm depending on other folks to test SLD. They are tied up with other issues ATM.
I have had another OEM test with several disks and multiple ATTN's pressed/cancel and current code seems to be working well so far, except the SLD case.
The change in the patch was only ensuring that we don't start another POWER_ON or POWER_OFF before the earlier operation was complete.
Would it be alright to fix SLD with this version while we can probe a clean approach that can give us sufficient time to test a clean approach that works with all the different combinations and OEM systems?
Cheers Ashok
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