Messages in this thread Patch in this message | | | From | Alan Tull <> | Subject | [PATCH 6/8] fpga dt: bindings for Altera Partial Reconfiguration IP. | Date | Thu, 23 Mar 2017 19:34:29 -0500 |
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From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Device Tree bindings for Altera Partial Reconfiguration IP.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Alan Tull <atull@kernel.org> --- Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt new file mode 100644 index 0000000..52a294c --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt @@ -0,0 +1,12 @@ +Altera Arria10 Partial Reconfiguration IP + +Required properties: +- compatible : should contain "altr,a10-pr-ip" +- reg : base address and size for memory mapped io. + +Example: + + fpga_mgr: fpga-mgr@ff20c000 { + compatible = "altr,a10-pr-ip"; + reg = <0xff20c000 0x10>; + }; -- 2.7.4
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