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Subject[PATCH] clk: tegra: fix disable unused for clocks sharing enable bit
Date
In case 2 clocks share an enable bit and one of them is enabled by a driver
and the other one is not, CCF will think it's enabled because it will only
look at the hw state. Therefor it will disable the clock and thus also
disable the other clock which was enabled. Solve this by reading the
initial state of the enable bit and incrementing the refcount if it's set.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-periph-gate.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 8812782..303ef32 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -159,6 +159,9 @@ struct clk *tegra_clk_register_periph_gate(const char *name,
gate->enable_refcnt = enable_refcnt;
gate->regs = pregs;

+ if (read_enb(gate) & periph_clk_to_bit(gate))
+ enable_refcnt[clk_num]++;
+
/* Data in .init is copied by clk_register(), so stack variable OK */
gate->hw.init = &init;

--
1.9.1
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