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    SubjectRe: [PATCH 03/20] asm-generic/io.h: add PCI config space remap interface
    [+cc Luis]

    On Mon, Feb 27, 2017 at 03:14:14PM +0000, Lorenzo Pieralisi wrote:
    > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
    > Posting") mandate non-posted configuration transactions. As further
    > highlighted in the PCIe specifications (4.0 - Rev0.3, "Ordering
    > Considerations for the Enhanced Configuration Access Mechanism"),
    > through ECAM and ECAM-derivative configuration mechanism, the memory
    > mapped transactions from the host CPU into Configuration Requests on the
    > PCI express fabric may create ordering problems for software because
    > writes to memory address are typically posted transactions (unless the
    > architecture can enforce through virtual address mapping non-posted
    > write transactions behaviour) but writes to Configuration Space are not
    > posted on the PCI express fabric.
    >
    > Current DT and ACPI host bridge controllers map PCI configuration space
    > (ECAM and ECAM-derivative) into the virtual address space through
    > ioremap() calls, that are non-cacheable device accesses on most
    > architectures, but may provide "bufferable" or "posted" write semantics
    > in architecture like eg ARM/ARM64 that allow ioremap'ed regions writes
    > to be buffered in the bus connecting the host CPU to the PCI fabric;
    > this behaviour, as underlined in the PCIe specifications, may trigger
    > transactions ordering rules and must be prevented.
    >
    > Introduce a new generic and explicit API to create a memory
    > mapping for ECAM and ECAM-derivative config space area that
    > defaults to ioremap_nocache() (which should provide a sane default
    > behaviour) but still allowing architectures on which ioremap_nocache()
    > results in posted write transactions to override the function
    > call with an arch specific implementation that complies with
    > the PCI specifications for configuration transactions.
    >
    > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    > Cc: Arnd Bergmann <arnd@arndb.de>
    > Cc: Will Deacon <will.deacon@arm.com>
    > Cc: Bjorn Helgaas <bhelgaas@google.com>
    > Cc: Russell King <linux@armlinux.org.uk>
    > Cc: Catalin Marinas <catalin.marinas@arm.com>
    > ---
    > include/asm-generic/io.h | 9 +++++++++
    > 1 file changed, 9 insertions(+)
    >
    > diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
    > index 7ef015e..52dda81 100644
    > --- a/include/asm-generic/io.h
    > +++ b/include/asm-generic/io.h
    > @@ -915,6 +915,15 @@ extern void ioport_unmap(void __iomem *p);
    > #endif /* CONFIG_GENERIC_IOMAP */
    > #endif /* CONFIG_HAS_IOPORT_MAP */
    >
    > +#ifndef pci_remap_cfgspace
    > +#define pci_remap_cfgspace pci_remap_cfgspace
    > +static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset,
    > + size_t size)
    > +{
    > + return ioremap_nocache(offset, size);
    > +}

    I'm fine with this conceptually, but I think it would make more sense
    if the name weren't specific to PCI or config space, e.g.,
    ioremap_nopost() or something.

    > +#endif
    > +
    > #ifndef xlate_dev_kmem_ptr
    > #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
    > static inline void *xlate_dev_kmem_ptr(void *addr)
    > --
    > 2.10.0
    >

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