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SubjectRe: [PATCH] mfd: altr-a10sr: Add Arria10 SR sysfs attributes
On Tue, 14 Feb 2017, thor.thayer@linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
>
> Add the Altera Arria10 DevKit sysfs attributes to the
> MFD device. Update copyright and email.
>
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> drivers/mfd/altera-a10sr.c | 98 ++++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 95 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mfd/altera-a10sr.c b/drivers/mfd/altera-a10sr.c
> index 06e1f7f..8c51818 100644
> --- a/drivers/mfd/altera-a10sr.c
> +++ b/drivers/mfd/altera-a10sr.c
> @@ -1,9 +1,9 @@
> /*
> * Altera Arria10 DevKit System Resource MFD Driver
> *
> - * Author: Thor Thayer <tthayer@opensource.altera.com>
> + * Author: Thor Thayer <thor.thayer@linux.intel.com>
> *
> - * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
> + * Copyright Intel Corporation (C) 2014-2017. All Rights Reserved
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms and conditions of the GNU General Public License,
> @@ -35,6 +35,89 @@
> },
> };
>
> +/* Add sysfs interface for MAX5 System Resource Controller */
> +static unsigned int a10sr_reg_addr;
> +static ssize_t a10sr_reg_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "0x%02x\n", a10sr_reg_addr);
> +}
> +
> +static ssize_t a10sr_reg_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + int ret = kstrtouint(buf, 0, &a10sr_reg_addr);
> +
> + if (ret || (a10sr_reg_addr < 0) ||
> + (a10sr_reg_addr > ALTR_A10SR_PMBUS_REG)) {
> + a10sr_reg_addr = 0;
> + dev_err(dev, "Invalid register address\n");
> + return -EINVAL;
> + }
> + return (ssize_t)count;
> +}

I don't think we can allow this. Allowing users to read and write
directly to registers from userspace is a really bad idea.

--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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