Messages in this thread | | | From | Linus Walleij <> | Date | Wed, 15 Mar 2017 10:37:12 +0100 | Subject | Re: [PATCH 2/2] MIPS: NI 169445 board support |
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On Mon, Mar 6, 2017 at 9:06 PM, Nathan Sullivan <nathan.sullivan@ni.com> wrote:
> Support the National Instruments 169445 board. > > Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> (...)
> + gpio1:gpio-controller@1f300010 { > + compatible = "ni,169445-nand-gpio"; > + reg = <0x10 0x4>; > + reg-names = "dat"; > + gpio-controller; > + #gpio-cells = <2>; > + ngpios = <5>;
Here I would add:
gpio-line-names = "NC", "NCE", "ALE", "CLE", "NWP";
(Dunno about the first one, maybe you have a schematic?)
> + }; > + > + gpio2:gpio-controller@1f300014 { > + compatible = "ni,169445-nand-gpio"; > + reg = <0x14 0x4>; > + reg-names = "dat"; > + gpio-controller; > + #gpio-cells = <2>; > + ngpios = <1>;
gpio-line-names = "RDY";
> + }; > + > + nand@1f300000 { > + compatible = "gpio-control-nand"; > + nand-on-flash-bbt; > + nand-ecc-mode = "soft_bch"; > + nand-ecc-step-size = <512>; > + nand-ecc-strength = <4>; > + reg = <0x0 4>; > + gpios = <&gpio2 0 0>, /* rdy */ > + <&gpio1 1 0>, /* nce */ > + <&gpio1 2 0>, /* ale */ > + <&gpio1 3 0>, /* cle */ > + <&gpio1 4 0>; /* nwp */ > + };
To reflect this. "lsgpio" gives better info after that.
Other than that: Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours, Linus Walleij
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