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    Subject[PATCH 4.10 154/167] mtd: nand: ifc: Fix location of eccstat registers for IFC V1.0
    Date
    4.10-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Mark Marshall <mark.marshall@omicronenergy.com>

    commit 656441478ed55d960df5f3ccdf5a0f8c61dfd0b3 upstream.

    The commit 7a654172161c ("mtd/ifc: Add support for IFC controller
    version 2.0") added support for version 2.0 of the IFC controller.
    The version 2.0 controller has the ECC status registers at a different
    location to the previous versions.

    Correct the fsl_ifc_nand structure so that the ECC status can be read
    from the correct location for both version 1.0 and 2.0 of the controller.

    Fixes: 7a654172161c ("mtd/ifc: Add support for IFC controller version 2.0")
    Signed-off-by: Mark Marshall <mark.marshall@omicronenergy.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/mtd/nand/fsl_ifc_nand.c | 8 +++++++-
    include/linux/fsl_ifc.h | 8 ++++++--
    2 files changed, 13 insertions(+), 3 deletions(-)

    --- a/drivers/mtd/nand/fsl_ifc_nand.c
    +++ b/drivers/mtd/nand/fsl_ifc_nand.c
    @@ -258,9 +258,15 @@ static void fsl_ifc_run_command(struct m
    int bufnum = nctrl->page & priv->bufnum_mask;
    int sector = bufnum * chip->ecc.steps;
    int sector_end = sector + chip->ecc.steps - 1;
    + __be32 *eccstat_regs;
    +
    + if (ctrl->version >= FSL_IFC_VERSION_2_0_0)
    + eccstat_regs = ifc->ifc_nand.v2_nand_eccstat;
    + else
    + eccstat_regs = ifc->ifc_nand.v1_nand_eccstat;

    for (i = sector / 4; i <= sector_end / 4; i++)
    - eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]);
    + eccstat[i] = ifc_in32(&eccstat_regs[i]);

    for (i = sector; i <= sector_end; i++) {
    errors = check_read_ecc(mtd, ctrl, eccstat, i);
    --- a/include/linux/fsl_ifc.h
    +++ b/include/linux/fsl_ifc.h
    @@ -733,8 +733,12 @@ struct fsl_ifc_nand {
    __be32 nand_erattr1;
    u32 res19[0x10];
    __be32 nand_fsr;
    - u32 res20[0x3];
    - __be32 nand_eccstat[6];
    + u32 res20;
    + /* The V1 nand_eccstat is actually 4 words that overlaps the
    + * V2 nand_eccstat.
    + */
    + __be32 v1_nand_eccstat[2];
    + __be32 v2_nand_eccstat[6];
    u32 res21[0x1c];
    __be32 nanndcr;
    u32 res22[0x2];

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