Messages in this thread | | | Date | Wed, 8 Feb 2017 10:43:13 +0100 | From | Peter Zijlstra <> | Subject | Re: [kernel-hardening] Re: [PATCH 4/4] refcount: Report failures through CHECK_DATA_CORRUPTION |
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On Wed, Feb 08, 2017 at 10:12:50AM +0100, Peter Zijlstra wrote: > Something like: > > #define EX_REG_HANDLER(_reg) \ > bool ex_handler_value_##_reg(const struct exception_table_entry *fixup, \ > struct pt_regs *regs, int trapnr) \ > { \ > void (*handler)(unsigned long) = \ > (void *)((unsigned long)&fixup->to + fixup->to); \ > \ > if (trapnr != X86_TRAP_UD) \ > return false; \ > \ > regs->ip += 2; /* size of UD2 instruction */ \ > handler(regs->_reg); \ > return true; \ > } > > EX_REG_HANDLER(bx); > EX_REG_HANDLER(cx); > ... > EX_REG_HANDLER(ss); > > > asm ( > " .macro reg_to_handler r\n" > " .irp rs,bx,cx,...,ss\n" > " .ifc \\r, %\\rs\n" > " ex_handler_value_\\rs\n" > " .endif\n" " .ifc \\r, %e\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" " .ifc \\r, %r\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" > " .endr\n" > " .endm\n" > );
to match the 16, 32 and 64 bit names of the same registers. The byte registers will need additional magic :/
> #define EXCEPTION_VALUE(val, handler) \ > asm volatile ("1: ud2" \ > _ASM_EXTABLE_HANDLE(1b, handler, \ > reg_to_handler %0) \ > : : "r" (val)) > > > Where the generic version can simply be: > > #define EXCEPTION_VALUE(val, handler) handler((unsigned long)val) > > > Makes sense?
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