Messages in this thread | | | Date | Mon, 27 Feb 2017 08:32:30 -0600 | From | Rob Herring <> | Subject | Re: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. |
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On Wed, Feb 15, 2017 at 01:10:37PM -0800, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Device Tree bindings for Altera Partial Reconfiguraion IP? > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > --- > Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt > > diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt > new file mode 100644 > index 0000000..ada821f > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt > @@ -0,0 +1,12 @@ > +Altera Partial Reconfiguration IP > + > +Required properties: > +- compatible : should contain "altr,pr-ip"
Kind of generic. There's only one version of h/w?
> +- reg : base address and size for memory mapped io. > + > +Example: > + > + fpga_mgr: fpga-mgr@ff20c000 { > + compatible = "altr,pr-ip"; > + reg = <0xff20c000 0x10>; > + }; > -- > 2.7.4 >
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