lkml.org 
[lkml]   [2017]   [Feb]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH v3 4/8] phy: phy-mt65xx-usb3: move clock from phy node into port nodes
From
Date
Hello!

On 2/22/2017 11:55 AM, Chunfeng Yun wrote:

> the reference clock of HighSpeed port is 48M which comes from PLL;
> the reference clock of SuperSpeed port is 26M which usually comes
> from 26M oscillator directly, but some SoCs are not, add it for

... but on some SoCs does not?

> compatibility, and put them into port node for flexibility.
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
[...]

MBR, Sergei

\
 
 \ /
  Last update: 2017-02-22 10:36    [W:0.607 / U:0.024 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site