Messages in this thread | | | Subject | Re: [PATCH v3 4/8] phy: phy-mt65xx-usb3: move clock from phy node into port nodes | From | Sergei Shtylyov <> | Date | Wed, 22 Feb 2017 12:34:56 +0300 |
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Hello!
On 2/22/2017 11:55 AM, Chunfeng Yun wrote:
> the reference clock of HighSpeed port is 48M which comes from PLL; > the reference clock of SuperSpeed port is 26M which usually comes > from 26M oscillator directly, but some SoCs are not, add it for
... but on some SoCs does not?
> compatibility, and put them into port node for flexibility. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> [...]
MBR, Sergei
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