Messages in this thread | | | Date | Thu, 16 Feb 2017 21:06:08 +0100 | From | Borislav Petkov <> | Subject | Re: [RFC PATCH v4 03/28] x86: Add the Secure Memory Encryption CPU feature |
| |
On Thu, Feb 16, 2017 at 01:42:13PM -0600, Tom Lendacky wrote: > I realize it's a bit more code and expands the changes but I thought it > would be a bit clearer as to what was going on this way. And then the > follow on patch for the physical address reduction goes in nicely, too.
Well, the code from the next patch should go to AMD-specific place like arch/x86/kernel/cpu/amd.c anyway, where you don't have to do vendor checks.
> If you prefer I stay with the scattered feature approach and then clear > the bit based on the MSR at the end of init_amd() I can do that. I'm > not attached to either method.
Yes please. We should keep the shole X86_FEATURE machinery from exploding in size. Especially if CPUID_0x8000001f is not a leaf we're going to be adding the majority of its bits, to warrant a separate ->x86_capability array element.
[If it does later, we can always move it to a separate element. ]
Thanks.
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
| |