Messages in this thread | | | From | David Laight <> | Subject | RE: [PATCH 3/4] RISC-V: Flush I$ when making a dirty page executable | Date | Tue, 21 Nov 2017 16:57:07 +0000 |
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From: Palmer Dabbelt > Sent: 20 November 2017 18:58 > > The RISC-V ISA allows for instruction caches that are not coherent WRT > stores, even on a single hart. As a result, we need to explicitly flush > the instruction cache whenever marking a dirty page as executable in > order to preserve the correct system behavior.
Isn't the I-flush only needed if there has been an unmap since the previous I-flush? Since code is rarely unmapped (exec and driver unload come to mind) the I-flush won't be needed very often.
David
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