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    Subject[PATCH v5 03/11] x86: define the feature control MSR's SGX enable bit
    Date
    From: Sean Christopherson <sean.j.christopherson@intel.com>

    Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
    Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
    ---
    arch/x86/include/asm/msr-index.h | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 17f5c12e1afd..b35cb98b5d60 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -435,6 +435,7 @@
    #define FEATURE_CONTROL_LOCKED (1<<0)
    #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
    #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
    +#define FEATURE_CONTROL_SGX_ENABLE (1<<18)
    #define FEATURE_CONTROL_LMCE (1<<20)

    #define MSR_IA32_APICBASE 0x0000001b
    --
    2.14.1
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