Messages in this thread | | | From | Doug Anderson <> | Date | Wed, 11 Oct 2017 16:55:31 -0700 | Subject | Re: [PATCH 2/3] mmc: dw_mmc: Fix the CTO timeout calculation |
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Hi,
On Mon, Oct 9, 2017 at 12:03 AM, Shawn Lin <shawn.lin@rock-chips.com> wrote: > Hi > > On 2017/9/28 4:56, Douglas Anderson wrote: >> >> In the commit 03de19212ea3 ("mmc: dw_mmc: introduce timer for broken >> command transfer over scheme") we tried to calculate the expected >> hardware command timeout value. Unfortunately that calculation isn't >> quite correct in all cases. It used "bus_hz" but, as far as I can >> tell, it's supposed to use the card clock. Let's account for the div >> value, which is documented as 2x the value stored in the register, or >> 1 if the register is 0. > > > Good catch. > Would you mind appending a new patch to fix the drto case?
I can add it to the series. It'll be a separate patch, though, since I wouldn't suggest backporting that one. The DRTO timeout is so long that it's really hard to hit it in this way so I think the argument is much more academic there. Still good to fix it, though.
-Doug
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