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SubjectRe: [PATCH] clk: samsung: exynos5420: Mark CLK_ACLK432_SCALER as CLK_IS_CRITICAL
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On 01/20/2017 11:41 AM, Javier Martinez Canillas wrote:
> On Exynos5800 SoC the SCALER block uses 2 input clocks: CLK_ACLK_300_GSCL
> and CLK_ACLK432_SCALER, so both needs to be ungated in order to access it.
>
> But Exynos5420 only has the CLK_ACLK_300_GSCL as gsc_pd clk. So just using
> this definition from exynos5420.dtsi in Exynos5800 leads to the following:
[...]
> So until a proper solution based on runtime PM gets merged, mark the clock
> as critical to prevent it to be gated.
>
> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>

Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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