Messages in this thread | | | Subject | Re: [PATCH v2] arm64: do not set dma masks that device connection can't handle | From | Nikita Yushchenko <> | Date | Wed, 11 Jan 2017 15:37:22 +0300 |
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> I actually have a third variation of this problem involving a PCI root > complex which *could* drive full-width (40-bit) addresses, but won't, > due to the way its PCI<->AXI interface is programmed. That would require > even more complicated dma-ranges handling to describe the windows of > valid physical addresses which it *will* pass, so I'm not pressing the > issue - let's just get the basic DMA mask case fixed first.
R-Car + NVMe is actually not "basic case".
It has PCI<->AXI interface involved. PCI addresses are 64-bit and controller does handle 64-bit addresses there. Mapping between PCI addresses and AXI addresses is defined. But AXI is 32-bit.
SoC has iommu that probably could be used between PCIe module and RAM. Although AFAIK nobody made that working yet.
Board I work with has 4G of RAM, in 4 banks, located at different parts of wide address space, and only one of them is below 4G. But if iommu is capable of translating addresses such that 4 gigabyte banks map to first 4 gigabytes of address space, then all memory will become available for DMA from PCIe device.
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