Messages in this thread Patch in this message | | | From | John Garry <> | Subject | [PATCH 10/15] hisi_sas: fix HBA SAS addr endianness for v2 hw | Date | Tue, 6 Sep 2016 23:36:20 +0800 |
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The endianness for the SAS address in the TX_ID_DWORD registers is set incorrectly. We see errors like this in the boot log: [ 7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled
This is due to the host SAS addr not matching the PHY SAS addr in the expander host-attached phy discovery responses.
To fix, we byte swap the SAS addr from BE to LE (which is the endianness of the SAS controller).
Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> --- drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index ae44443..ce84211 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -562,13 +562,13 @@ static void config_id_frame_v2_hw(struct hisi_hba *hisi_hba, int phy_no) hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD0, __swab32(identify_buffer[0])); hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD1, - identify_buffer[2]); + __swab32(identify_buffer[1])); hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD2, - identify_buffer[1]); + __swab32(identify_buffer[2])); hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD3, - identify_buffer[4]); + __swab32(identify_buffer[3])); hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD4, - identify_buffer[3]); + __swab32(identify_buffer[4])); hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD5, __swab32(identify_buffer[5])); } -- 1.9.1
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