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SubjectRe: [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe
On Wed, Sep 14, 2016 at 5:12 PM, Mika Westerberg
<mika.westerberg@linux.intel.com> wrote:
> On Wed, Sep 14, 2016 at 02:46:01PM +0200, Linus Walleij wrote:
>> > I'm going to re-read the hardware spec and see if there is anything we
>> > can do about this. The newer hardware (Skylake, Broxton) has a bit that
>> > tells the IRQ is routed directly to I/O-APIC but unfortunately Braswell
>> > misses that. There may be something else, though.
>>
>> So as far as we can determine:
>>
>> (A) we are running on Braswell and
>> (B) we are probing this driver
>>
>> we can conclude that
>>
>> (C) IRQs A,B,C are reserved by BIOS?
>>
>> That sounds doable?
>
> Yes, it's doable but that requires some hard coding in the driver :-/

From my point of view that is the lesser of two evils.

We only have hard-coding (syntactic) madness over having
behaviour-dependent (semantic) madness.

Yours,
Linus Walleij

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