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SubjectRe: [PATCH 2/2] usb: dwc3: Added a property to set GFLADJ register
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Hi,

Rob Herring <robh@kernel.org> writes:
>> Synopsys HW setup (HAPS DX and phy board) requires a preset to this
>> register to improve interoperablitity. For example, the value for
>> GFLADJ_REFCLK_LPM_SEL should be set to 0 with ref_clk period of 50.
>
> This sounds like it should be handled in the driver. Is it a simple,
> constant correlation of ref_clk period to this value?

you mean that this could be calculated based off of clk_get_rate() ?

--
balbi
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