Messages in this thread Patch in this message | | | From | Madhavan Srinivasan <> | Subject | [PATCH 09/13] powerpc/perf: Add support for perf_arch_regs for PPC970 processor | Date | Mon, 29 Aug 2016 02:30:54 +0530 |
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Add code to define support functions and registers mask for PPC970 processor.
Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Stephane Eranian <eranian@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/ppc970-pmu.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/arch/powerpc/perf/ppc970-pmu.c b/arch/powerpc/perf/ppc970-pmu.c index 8b6a8a36fa38..0b3121335bf0 100644 --- a/arch/powerpc/perf/ppc970-pmu.c +++ b/arch/powerpc/perf/ppc970-pmu.c @@ -12,6 +12,7 @@ #include <linux/perf_event.h> #include <asm/reg.h> #include <asm/cputable.h> +#include <uapi/asm/perf_regs.h> /* * Bits in event code for PPC970 @@ -474,6 +475,26 @@ static int ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { }, }; +#define PPC970_ARCH_REGS_MASK (PERF_ARCH_REG_PVR |\ + PERF_ARCH_REG_PMC1 | PERF_ARCH_REG_PMC2 |\ + PERF_ARCH_REG_PMC3 | PERF_ARCH_REG_PMC4 |\ + PERF_ARCH_REG_PMC5 | PERF_ARCH_REG_PMC6 |\ + PERF_ARCH_REG_MMCR0 | PERF_ARCH_REG_MMCR1 | PERF_ARCH_REG_MMCRA) + +static void ppc970_get_arch_regs(struct perf_arch_regs *regs) +{ + regs->regs[PERF_ARCH_REG_POWERPC_PVR] = mfspr(SPRN_PVR); + regs->regs[PERF_ARCH_REG_POWERPC_PMC1] = mfspr(SPRN_PMC1); + regs->regs[PERF_ARCH_REG_POWERPC_PMC2] = mfspr(SPRN_PMC2); + regs->regs[PERF_ARCH_REG_POWERPC_PMC3] = mfspr(SPRN_PMC3); + regs->regs[PERF_ARCH_REG_POWERPC_PMC4] = mfspr(SPRN_PMC4); + regs->regs[PERF_ARCH_REG_POWERPC_PMC5] = mfspr(SPRN_PMC5); + regs->regs[PERF_ARCH_REG_POWERPC_PMC6] = mfspr(SPRN_PMC6); + regs->regs[PERF_ARCH_REG_POWERPC_MMCR0] = mfspr(SPRN_MMCR0); + regs->regs[PERF_ARCH_REG_POWERPC_MMCR1] = mfspr(SPRN_MMCR1); + regs->regs[PERF_ARCH_REG_POWERPC_MMCRA] = mfspr(SPRN_MMCRA); +} + static struct power_pmu ppc970_pmu = { .name = "PPC970/FX/MP", .n_counter = 8, @@ -488,6 +509,8 @@ static struct power_pmu ppc970_pmu = { .generic_events = ppc970_generic_events, .cache_events = &ppc970_cache_events, .flags = PPMU_NO_SIPR | PPMU_NO_CONT_SAMPLING, + .ar_mask = PPC970_ARCH_REGS_MASK, + .get_arch_regs = ppc970_get_arch_regs, }; static int __init init_ppc970_pmu(void) -- 2.7.4
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