Messages in this thread | | | Date | Tue, 16 Aug 2016 09:27:05 +0800 | From | "Yong, Jonathan" <> | Subject | Re: [PATCH v6 0/3] PCI: Precision Time Measurement support |
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On 08/16/2016 02:51, Bjorn Helgaas wrote: >> >> This line: >> ctrl = PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT; >> >> should also set the responder capable bit (7.32.2): >> If PTM Root Capable is Set, this bit must be Set to 1b. > > The PTM Responder Capable bit (bit 1 in Table 7-145) is a HwInit bit > in the PTM Capability register, so it's read-only from the kernel's > perspective. > > The line you mention ("ctrl = PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT") > is turning on bits in the PTM Control register, not the Capability > register. >
My bad, there is no "responder enable" bit control, patch looks good.
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