Messages in this thread | | | From | Heiko Stübner <> | Subject | Re: [PATCH v3 4/7] clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits | Date | Fri, 12 Aug 2016 10:05:37 +0200 |
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Am Dienstag, 2. August 2016, 15:19:58 schrieb Xing Zheng: > Dues to incorrect diagram, we need to fix incorrect bits for > (c/g)pll_aclk_emmc_src: > cpll_aclk_emmc_src --> G6[13] > gpll_aclk_emmc_src --> G6[12] > > Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> > Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
applied to my clk-fixes branch for 4.8
Thanks Heiko
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