Messages in this thread | | | Subject | Re: [PATCH v2 06/13] sched: Store maximum per-cpu capacity in root domain | From | Dietmar Eggemann <> | Date | Wed, 13 Jul 2016 14:48:24 +0100 |
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On 13/07/16 13:40, Vincent Guittot wrote: > On 22 June 2016 at 19:03, Morten Rasmussen <morten.rasmussen@arm.com> wrote: >> From: Dietmar Eggemann <dietmar.eggemann@arm.com> >> >> To be able to compare the capacity of the target cpu with the highest >> available cpu capacity, store the maximum per-cpu capacity in the root >> domain. > > I thought that the capacity of all CPUS were built so the highest > capacity of the CPU of the system is 1024 for big LITTLE system . So > this patch doesn't seem necessary for big.LITTLE system
The asymmetric cpu capacity support currently only has an effect on arm big.LITTLE (32bit) using the existing 'struct cpu_efficiency table_efficiency[]' based approach.
So e.g. on TC2 we have 1441 for highest capacity.
[ 0.041007] SMP: Total of 5 processors activated (240.00 BogoMIPS). [ 0.041024] CPU: All CPU(s) started in SVC mode. [ 0.041103] CPU0 attaching sched-domain: [ 0.041119] domain 0: span 0-1 level MC [ 0.041141] groups: 0 (cpu_capacity = 1441) 1 (cpu_capacity = 1441) [ 0.041179] domain 1: span 0-4 level DIE [ 0.041199] groups: 0-1 (cpu_capacity = 2882) 2-4 (cpu_capacity = 1818) [ 0.041245] CPU1 attaching sched-domain: [ 0.041260] domain 0: span 0-1 level MC [ 0.041279] groups: 1 (cpu_capacity = 1441) 0 (cpu_capacity = 1441) [ 0.041315] domain 1: span 0-4 level DIE [ 0.041334] groups: 0-1 (cpu_capacity = 2882) 2-4 (cpu_capacity = 1818) [ 0.041376] CPU2 attaching sched-domain: [ 0.041391] domain 0: span 2-4 level MC [ 0.041409] groups: 2 (cpu_capacity = 606) 3 (cpu_capacity = 606) 4 (cpu_capacity = 606) [ 0.041460] domain 1: span 0-4 level DIE [ 0.041479] groups: 2-4 (cpu_capacity = 1818) 0-1 (cpu_capacity = 2882) ..
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