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    Subject[PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399
    Date
    On rk3399 we'd like to be able to properly set corecfg registers in the
    Arasan SDHCI component. Specify the syscon to enable that.

    Signed-off-by: Douglas Anderson <dianders@chromium.org>
    ---
    arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
    index a4383f359264..1b57e92e0093 100644
    --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
    +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
    @@ -220,6 +220,7 @@
    compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
    reg = <0x0 0xfe330000 0x0 0x10000>;
    interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
    + arasan,soc-ctl-syscon = <&grf>;
    assigned-clocks = <&cru SCLK_EMMC>;
    assigned-clock-rates = <200000000>;
    clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
    --
    2.8.0.rc3.226.g39d4020
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