Messages in this thread | | | Subject | Re: [PATCH 3/5] mmu: don't set the present bit unconditionally | From | Xiao Guangrong <> | Date | Wed, 29 Jun 2016 11:17:39 +0800 |
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On 06/28/2016 12:32 PM, Bandan Das wrote: > To support execute only mappings on behalf of L1 > hypervisors, we teach set_spte() to honor L1's valid XWR > bits. This is only if host supports EPT execute only. Reuse > ACC_USER_MASK to signify if the L1 hypervisor has the R bit > set > > Signed-off-by: Bandan Das <bsd@redhat.com> > --- > arch/x86/kvm/mmu.c | 9 +++++++-- > arch/x86/kvm/paging_tmpl.h | 2 +- > arch/x86/kvm/vmx.c | 2 +- > 3 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index 875d4f7..ee2fb16 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -2516,13 +2516,17 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, > gfn_t gfn, kvm_pfn_t pfn, bool speculative, > bool can_unsync, bool host_writable) > { > - u64 spte; > + u64 spte = 0; > int ret = 0; > + struct kvm_mmu *context = &vcpu->arch.mmu; > + bool execonly = !(context->guest_rsvd_check.bad_mt_xwr & > + (1ull << VMX_EPT_EXECUTABLE_MASK));
Could we introduce a new field, say execonly, to "struct kvm_mmu"? That would make the code be more clearer.
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