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    SubjectRe: [PATCH v4 net-next v4 14/14] net: dsa: mv88e6xxx: abstract switch registers accesses
    Hi,

    [auto build test WARNING on net-next/master]

    url: https://github.com/0day-ci/linux/commits/Vivien-Didelot/net-dsa-mv88e6xxx-probe-compatible/20160621-020115
    config: sparc64-allyesconfig (attached as .config)
    compiler: sparc64-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
    reproduce:
    wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
    chmod +x ~/bin/make.cross
    # save the attached .config to linux build tree
    make.cross ARCH=sparc64

    All warnings (new ones prefixed by >>):

    In file included from include/linux/printk.h:289:0,
    from include/linux/kernel.h:13,
    from include/linux/delay.h:10,
    from drivers/net/dsa/mv88e6xxx.c:16:
    drivers/net/dsa/mv88e6xxx.c: In function 'mv88e6xxx_read':
    >> drivers/net/dsa/mv88e6xxx.c:195:19: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'u16 * {aka short unsigned int *}' [-Wformat=]
    dev_dbg(ps->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
    ^
    include/linux/dynamic_debug.h:86:39: note: in definition of macro 'dynamic_dev_dbg'
    __dynamic_dev_dbg(&descriptor, dev, fmt, \
    ^
    >> drivers/net/dsa/mv88e6xxx.c:195:2: note: in expansion of macro 'dev_dbg'
    dev_dbg(ps->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
    ^

    vim +195 drivers/net/dsa/mv88e6xxx.c

    10 * This program is free software; you can redistribute it and/or modify
    11 * it under the terms of the GNU General Public License as published by
    12 * the Free Software Foundation; either version 2 of the License, or
    13 * (at your option) any later version.
    14 */
    15
    > 16 #include <linux/delay.h>
    17 #include <linux/etherdevice.h>
    18 #include <linux/ethtool.h>
    19 #include <linux/if_bridge.h>
    20 #include <linux/jiffies.h>
    21 #include <linux/list.h>
    22 #include <linux/mdio.h>
    23 #include <linux/module.h>
    24 #include <linux/of_device.h>
    25 #include <linux/of_mdio.h>
    26 #include <linux/netdevice.h>
    27 #include <linux/gpio/consumer.h>
    28 #include <linux/phy.h>
    29 #include <net/dsa.h>
    30 #include <net/switchdev.h>
    31 #include "mv88e6xxx.h"
    32
    33 static void assert_reg_lock(struct mv88e6xxx_priv_state *ps)
    34 {
    35 if (unlikely(!mutex_is_locked(&ps->reg_lock))) {
    36 dev_err(ps->dev, "Switch registers lock not held!\n");
    37 dump_stack();
    38 }
    39 }
    40
    41 /* The switch ADDR[4:1] configuration pins define the chip SMI device address
    42 * (ADDR[0] is always zero, thus only even SMI addresses can be strapped).
    43 *
    44 * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it
    45 * is the only device connected to the SMI master. In this mode it responds to
    46 * all 32 possible SMI addresses, and thus maps directly the internal devices.
    47 *
    48 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
    49 * multiple devices to share the SMI interface. In this mode it responds to only
    50 * 2 registers, used to indirectly access the internal SMI devices.
    51 */
    52
    53 static int mv88e6xxx_smi_read(struct mv88e6xxx_priv_state *ps,
    54 int addr, int reg, u16 *val)
    55 {
    56 if (!ps->smi_ops)
    57 return -EOPNOTSUPP;
    58
    59 return ps->smi_ops->read(ps, addr, reg, val);
    60 }
    61
    62 static int mv88e6xxx_smi_write(struct mv88e6xxx_priv_state *ps,
    63 int addr, int reg, u16 val)
    64 {
    65 if (!ps->smi_ops)
    66 return -EOPNOTSUPP;
    67
    68 return ps->smi_ops->write(ps, addr, reg, val);
    69 }
    70
    71 static int mv88e6xxx_smi_single_chip_read(struct mv88e6xxx_priv_state *ps,
    72 int addr, int reg, u16 *val)
    73 {
    74 int ret;
    75
    76 ret = mdiobus_read_nested(ps->bus, addr, reg);
    77 if (ret < 0)
    78 return ret;
    79
    80 *val = ret & 0xffff;
    81
    82 return 0;
    83 }
    84
    85 static int mv88e6xxx_smi_single_chip_write(struct mv88e6xxx_priv_state *ps,
    86 int addr, int reg, u16 val)
    87 {
    88 int ret;
    89
    90 ret = mdiobus_write_nested(ps->bus, addr, reg, val);
    91 if (ret < 0)
    92 return ret;
    93
    94 return 0;
    95 }
    96
    97 static const struct mv88e6xxx_ops mv88e6xxx_smi_single_chip_ops = {
    98 .read = mv88e6xxx_smi_single_chip_read,
    99 .write = mv88e6xxx_smi_single_chip_write,
    100 };
    101
    102 static int mv88e6xxx_smi_multi_chip_wait(struct mv88e6xxx_priv_state *ps)
    103 {
    104 int ret;
    105 int i;
    106
    107 for (i = 0; i < 16; i++) {
    108 ret = mdiobus_read_nested(ps->bus, ps->sw_addr, SMI_CMD);
    109 if (ret < 0)
    110 return ret;
    111
    112 if ((ret & SMI_CMD_BUSY) == 0)
    113 return 0;
    114 }
    115
    116 return -ETIMEDOUT;
    117 }
    118
    119 static int mv88e6xxx_smi_multi_chip_read(struct mv88e6xxx_priv_state *ps,
    120 int addr, int reg, u16 *val)
    121 {
    122 int ret;
    123
    124 /* Wait for the bus to become free. */
    125 ret = mv88e6xxx_smi_multi_chip_wait(ps);
    126 if (ret < 0)
    127 return ret;
    128
    129 /* Transmit the read command. */
    130 ret = mdiobus_write_nested(ps->bus, ps->sw_addr, SMI_CMD,
    131 SMI_CMD_OP_22_READ | (addr << 5) | reg);
    132 if (ret < 0)
    133 return ret;
    134
    135 /* Wait for the read command to complete. */
    136 ret = mv88e6xxx_smi_multi_chip_wait(ps);
    137 if (ret < 0)
    138 return ret;
    139
    140 /* Read the data. */
    141 ret = mdiobus_read_nested(ps->bus, ps->sw_addr, SMI_DATA);
    142 if (ret < 0)
    143 return ret;
    144
    145 *val = ret & 0xffff;
    146
    147 return 0;
    148 }
    149
    150 static int mv88e6xxx_smi_multi_chip_write(struct mv88e6xxx_priv_state *ps,
    151 int addr, int reg, u16 val)
    152 {
    153 int ret;
    154
    155 /* Wait for the bus to become free. */
    156 ret = mv88e6xxx_smi_multi_chip_wait(ps);
    157 if (ret < 0)
    158 return ret;
    159
    160 /* Transmit the data to write. */
    161 ret = mdiobus_write_nested(ps->bus, ps->sw_addr, SMI_DATA, val);
    162 if (ret < 0)
    163 return ret;
    164
    165 /* Transmit the write command. */
    166 ret = mdiobus_write_nested(ps->bus, ps->sw_addr, SMI_CMD,
    167 SMI_CMD_OP_22_WRITE | (addr << 5) | reg);
    168 if (ret < 0)
    169 return ret;
    170
    171 /* Wait for the write command to complete. */
    172 ret = mv88e6xxx_smi_multi_chip_wait(ps);
    173 if (ret < 0)
    174 return ret;
    175
    176 return 0;
    177 }
    178
    179 static const struct mv88e6xxx_ops mv88e6xxx_smi_multi_chip_ops = {
    180 .read = mv88e6xxx_smi_multi_chip_read,
    181 .write = mv88e6xxx_smi_multi_chip_write,
    182 };
    183
    184 static int mv88e6xxx_read(struct mv88e6xxx_priv_state *ps,
    185 int addr, int reg, u16 *val)
    186 {
    187 int err;
    188
    189 assert_reg_lock(ps);
    190
    191 err = mv88e6xxx_smi_read(ps, addr, reg, val);
    192 if (err)
    193 return err;
    194
    > 195 dev_dbg(ps->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
    196 addr, reg, val);
    197
    198 return 0;

    ---
    0-DAY kernel test infrastructure Open Source Technology Center
    https://lists.01.org/pipermail/kbuild-all Intel Corporation
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