Messages in this thread | | | Date | Thu, 16 Jun 2016 16:35:30 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH -v2 14/33] locking,m68k: Implement atomic_fetch_{add,sub,and,or,xor}() |
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On Thu, Jun 16, 2016 at 02:53:09PM +0200, Andreas Schwab wrote: > Peter Zijlstra <peterz@infradead.org> writes:
> > OK, care to elucidate? Clearly I need help reading this. > > grep '2.*atomic_read'
Much thanks to your detailed answer I found yet another obscure inline asm syntax 'feature'.
So the "2" input operand actually sets the value of "=&d" (tmp), how creative...
I would find:
#define ATOMIC_OP_RETURN(op, c_op, asm_op) \ static inline int atomic_##op##_return(int i, atomic_t *v) \ { \ int t, tmp = atomic_read(v); \ \ __asm__ __volatile__( \ "1: movel %2,%1\n" \ " " #asm_op "l %3,%1\n" \ " casl %2,%1,%0\n" \ " jne 1b" \ : "+m" (*v), "=&d" (t), "+d" (tmp) \ : "g" (i)); \ return t; \ }
Much more obvious.
But you're right, it seems to be sorted. I'll queue a patch removing that comment.
Thanks!
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