Messages in this thread | | | Date | Fri, 6 May 2016 11:20:20 -0700 | From | Stephen Boyd <> | Subject | Re: [PATCH 1/3] reset: hisilicon: add reset controller driver for hisilicon SOCs |
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On 04/23, Jiancheng Xue wrote: > In most of hisilicon SOCs, reset controller and clock provider are > combined together as a block named CRG (Clock and Reset Generator). > This patch mainly implements the reset function. > > Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> > Acked-by: Philipp Zabel <p.zabel@pengutronix.de> > ---
Applied to clk-hi3519
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