Messages in this thread | | | Subject | Re: [PATCH] soc/tegra: pmc: Fix "scheduling while atomic" | From | Dmitry Osipenko <> | Date | Thu, 5 May 2016 17:24:26 +0300 |
| |
Hello, Jon!
On 05.05.2016 16:17, Jon Hunter wrote: > > Thanks for the report. I have been unable to reproduce this, but then I > don't see my tegra20 entering LP2 during cpuidle. I did force my tegra20 > into LP2 during suspend which will exercise the same code but I did not > trigger this either. However, from looking at the code it does appear > that we could hit this. >
As I wrote before, it's quite difficult to reproduce.
> > Ideally, it would be great if we did not need to add another custom API > for this, but I did not find anything in the CCF that would allow us to > avoid but that was only a quick look. However, we could ask the CCF folks. >
Yes, CCF doesn't expose locked API. Code should be designed to avoid it.
> What I plan to do next is to understand if the pclk is likely to change. > I know that it comes from one of the plls but I am not sure if we ever > change the rate. If not we may be able to move this to probe time and > avoid this. >
That's reasonable, I'd also take a look at it. Thanks for the comment!
-- Dmitry
| |