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    Subject[PATCH -v3 8/8] locking, tile: Provide TILE specific smp_acquire__after_ctrl_dep
    Since TILE doesn't do read speculation, its control dependencies also
    guarantee LOAD->LOAD order and we don't need the additional RMB
    otherwise required to provide ACQUIRE semantics.

    Cc: Chris Metcalf <cmetcalf@mellanox.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    ---
    arch/tile/include/asm/barrier.h | 7 +++++++
    1 file changed, 7 insertions(+)

    --- a/arch/tile/include/asm/barrier.h
    +++ b/arch/tile/include/asm/barrier.h
    @@ -87,6 +87,13 @@ mb_incoherent(void)
    #define __smp_mb__after_atomic() __smp_mb()
    #endif

    +/*
    + * The TILE architecture does not do speculative reads; this ensures
    + * that a control dependency also orders against loads and already provides
    + * a LOAD->{LOAD,STORE} order and can forgo the additional RMB.
    + */
    +#define smp_acquire__after_ctrl_dep() barrier()
    +
    #include <asm-generic/barrier.h>

    #endif /* !__ASSEMBLY__ */

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