Messages in this thread | | | Date | Wed, 18 May 2016 12:21:17 +0530 | From | Shreyas B Prabhu <> | Subject | Re: [PATCH v2 4/9] powerpc/powernv: Make power7_powersave_common more generic |
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On 05/18/2016 12:07 PM, Gautham R Shenoy wrote: > Hi Shreyas, > > On Tue, May 03, 2016 at 01:54:33PM +0530, Shreyas B. Prabhu wrote: >> power7_powersave_common does common steps needed before entering idle >> state and eventually changes MSR to MSR_IDLE and does rfid to >> power7_enter_nap_mode. >> >> Make it more generic by passing the rfid address as a function parameter. >> Also make function name more generic. > > [..snip..] > >> >> _GLOBAL(power7_winkle) >> - li r3,3 >> + li r3,PNV_THREAD_WINKLE > > This particular change above can go as an independent patch.
Okay. > >> >> _GLOBAL(power7_wakeup_tb_loss) >> diff --git a/arch/powerpc/kernel/idle_power_common.S b/arch/powerpc/kernel/idle_power_common.S >> index 05954ae..ff7a541 100644 >> --- a/arch/powerpc/kernel/idle_power_common.S >> +++ b/arch/powerpc/kernel/idle_power_common.S >> @@ -21,8 +21,10 @@ >> * To check IRQ_HAPPENED in r4 >> * 0 - don't check >> * 1 - check >> + * >> + * Address to 'rfid' to in r5 >> */ >> -_GLOBAL(power7_powersave_common) >> +_GLOBAL(power_powersave_common) >> /* Use r3 to pass state nap/sleep/winkle */ >> /* NAP is a state loss, we create a regs frame on the >> * stack, fill it up with the state we care about and >> @@ -79,13 +81,12 @@ _GLOBAL(power7_powersave_common) >> * because as soon as we do that, another thread can switch >> * the MMU context to the guest. >> */ >> - LOAD_REG_IMMEDIATE(r5, MSR_IDLE) >> + LOAD_REG_IMMEDIATE(r7, MSR_IDLE) >> li r6, MSR_RI >> andc r6, r9, r6 >> - LOAD_REG_ADDR(r7, power7_enter_nap_mode) >> mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ >> - mtspr SPRN_SRR0, r7 >> - mtspr SPRN_SRR1, r5 >> + mtspr SPRN_SRR0, r5 >> + mtspr SPRN_SRR1, r7 >> rfid >> /* No return */ > > Any particular reason why you swapped the roles of r5 and r7 ? >
With this patch, r5 which is the third parameter to power_powersave_common contains the return address that needs to be written to SRR0. So here I'm keeping r5 unaltered and using r7 for the MSR.
Thanks, Shreyas
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