Messages in this thread | | | Date | Wed, 11 May 2016 15:29:36 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core |
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On Wed, May 11, 2016 at 03:23:36PM +0200, Jiri Olsa wrote: > On Thu, May 05, 2016 at 04:04:00PM -0700, Andi Kleen wrote: > > SNIP > > > + > > +EVENT_ATTR_STR_HT(topdown-total-slots, td_total_slots, > > + "event=0x3c,umask=0x0", /* cpu_clk_unhalted.thread */ > > + "event=0x3c,umask=0x0,any=1"); /* cpu_clk_unhalted.thread_any */ > > +EVENT_ATTR_STR_HT(topdown-total-slots.scale, td_total_slots_scale, "4", "2"); > > +EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued, > > + "event=0xe,umask=0x1"); /* uops_issued.any */ > > +EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired, > > + "event=0xc2,umask=0x2"); /* uops_retired.retire_slots */ > > +EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles, > > + "event=0x9c,umask=0x1"); /* idq_uops_not_delivered_core */ > > +EVENT_ATTR_STR_HT(topdown-recovery-bubbles, td_recovery_bubbles, > > + "event=0xd,umask=0x3,cmask=1", /* int_misc.recovery_cycles */ > > + "event=0xd,umask=0x3,cmask=1,any=1"); /* int_misc.recovery_cycles_any */ > > +EVENT_ATTR_STR_HT(topdown-recovery-bubbles.scale, td_recovery_bubbles_scale, > > + "4", "2"); > > + > > struct attribute *snb_events_attrs[] = { > > EVENT_PTR(mem_ld_snb), > > EVENT_PTR(mem_st_snb), > > + EVENT_PTR(td_slots_issued), > > + EVENT_PTR(td_slots_retired), > > + EVENT_PTR(td_fetch_bubbles), > > + EVENT_PTR(td_total_slots), > > + EVENT_PTR(td_total_slots_scale), > > + EVENT_PTR(td_recovery_bubbles), > > + EVENT_PTR(td_recovery_bubbles_scale), > > Peter, Ingo, > any thoughts about adding these events? The rest of the > tooling code is based on them being accepted..
I queued up these patches; but left the tool parts.
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