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    SubjectRe: [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC
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    Hi Paolo,

    On 3/31/16 18:23, Paolo Bonzini wrote:
    >
    >
    > On 31/03/2016 06:15, Suravee Suthikulpanit wrote:
    >>>> + vcpu->arch.cpuid_entries[i].ecx &= ~(1 << 21);
    >>>
    >>> and X86_FEATURE_X2APIC (or something with X2APIC in name) for the
    >>> bit.
    >>>
    >>> The code will become so obvious that the comment can be removed.
    >>> :)
    >>
    >> Good point. I can only find example of using (X86_FEATURE_X2APIC %
    >> 32) == 21.
    >
    > You can use bit(X86_FEATURE_X2APIC), it is defined in arch/x86/kvm/x86.h.

    Ahh, thanks.

    >
    >>> but the MSR interface is going to exit and host-side interrupt
    >>> delivery will probably still work, so I don't see a huge problem
    >>> with it.
    >>
    >> Agree that it will still work. However, in such case, the guest code
    >> would likely default to using x2APIC interface, which will not be
    >> handled by the AVIC hardware, and resulting in no performance
    >> improvement that we are trying to introduce.
    >
    > You would still get some improvement from exit-free interrupt delivery.

    Let me look into this and investigate some more.

    Thanks,
    Suravee

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