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SubjectRe: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait()
On Tue, Apr 26, 2016 at 05:33:44PM +0100, Will Deacon wrote:
> From 5aa5750d5eeb6e3a42f5547f094dc803f89793bb Mon Sep 17 00:00:00 2001
> From: Will Deacon <will.deacon@arm.com>
> Date: Tue, 26 Apr 2016 17:31:53 +0100
> Subject: [PATCH] fixup! locking,arm64: Introduce cmpwait()
>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/include/asm/cmpxchg.h | 15 +++++++++------
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
> index cd7bff6ddedc..9b7113a3f0d7 100644
> --- a/arch/arm64/include/asm/cmpxchg.h
> +++ b/arch/arm64/include/asm/cmpxchg.h
> @@ -225,18 +225,19 @@ __CMPXCHG_GEN(_mb)
> })
>
> #define __CMPWAIT_GEN(w, sz, name) \
> -void __cmpwait_case_##name(volatile void *ptr, unsigned long val) \
> +static inline void __cmpwait_case_##name(volatile void *ptr, \
> + unsigned long val) \
> { \
> unsigned long tmp; \
> \
> asm volatile( \
> " ldxr" #sz "\t%" #w "[tmp], %[v]\n" \
> " eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \
> - " cbnz %" #w "[tmp], 1f\n" \
> + " cbz %" #w "[tmp], 1f\n" \

Actually, you're right with cbnz. I only noticed when I came to implement
my own version of smp_cond_load_acquire. *sigh*

I have fixups applied locally, so maybe the best thing is for me to send
you an arm64 series on top of whatever you post next?

Will

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