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SubjectRe: [RFC][PATCH 10/31] locking,hexagon: Implement atomic_fetch_{add,sub,and,or,xor}()
On Sat, Apr 23, 2016 at 04:16:58AM +0200, Peter Zijlstra wrote:
> On Fri, Apr 22, 2016 at 11:04:23AM +0200, Peter Zijlstra wrote:
> > +#define ATOMIC_FETCH_OP(op) \
> > +static inline int atomic_fetch_##op(int i, atomic_t *v) \
> > +{ \
> > + int output, val; \
> > + \
> > + __asm__ __volatile__ ( \
> > + "1: %0 = memw_locked(%2);\n" \
> > + " %1 = "#op "(%0,%3);\n" \
> > + " memw_locked(%2,P3)=%0;\n" \
>
> I'm thinking that wants to be:
>
> memw_locked(%2,P3)=%1;
>
> > + " if !P3 jump 1b;\n" \
> > + : "=&r" (output), "=&r" (val) \
> > + : "r" (&v->counter), "r" (i) \
> > + : "memory", "p3" \
> > + ); \
> > + return output; \
> > +}

I think you are right. With the above fix,

Acked-by: Richard Kuo <rkuo@codeaurora.org>


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Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
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