Messages in this thread | | | Subject | Re: [PATCH] MIPS: Fix broken malta qemu | From | Qais Yousef <> | Date | Sat, 2 Apr 2016 13:19:03 +0100 |
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Hi Paul,
On 01/04/2016 13:48, Paul Burton wrote: > On Thu, Mar 17, 2016 at 09:08:09PM +0000, Qais Yousef wrote: >> Malta defconfig compiles with GIC on. Hence when compiling for SMP it causes the >> new IPI code to be activated. But on qemu malta there's no GIC causing a >> BUG_ON(!ipidomain) to be hit in mips_smp_ipi_init(). >> >> Since in that configuration one can only run a single core SMP (!), skip IPI >> initialisation if we detect that this is the case. It is a sensible behaviour >> to introduce and should keep such possible configuration to run rather than die >> hard unnecessarily. > Hi Qais/Ralf, > > This patch is insufficient I'm afraid. It's entirely possible to use SMP > with multiple VPEs in a single core on Malta boards that don't have a > GIC - we have code handling IPIs in that case guarded by #ifdef > CONFIG_MIPS_MT_SMP in arch/mips/mti-malta/malta-int.c. I think the > BUG_ON needs to be removed entirely, unless that single-core multi-VPE > IPI code is also converted to use an IPI irqdomain. >
I was under the impression that SMP is only supported under GIC and older forms of SMP are deprecated.
I think the problem you're describing is different to the one this is trying to fix. The right fix for your issue is to make CONFIG_GENERIC_IRQ_IPI selected when CONFIG_MIPS_GIC && !CONFIG_MIPS_MT_SMP.
Would it be easy for you to create such a patch and test it?
Thanks, Qais
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