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Subject[PATCH v2 07/14] USB: ch341: add support for parity, frame length, stop bits
Date
With the new reinitialization method, configuring parity, different
frame lengths and different stop bit settings work as expected on
both CH340G and CH341A. This has been extensively tested with a
logic analyzer.

Tested-by: Ryan Barber <rfb@skyscraper.nu>
Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
---
drivers/usb/serial/ch341.c | 36 ++++++++++++++++++++++++++++++------
1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index c001773..4d66f0f 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -346,6 +346,7 @@ static void ch341_set_termios(struct tty_struct *tty,
unsigned baud_rate;
unsigned long flags;
unsigned char ctrl;
+ unsigned cflag = tty->termios.c_cflag;
int r;

/* redundant changes may cause the chip to lose bytes */
@@ -356,7 +357,35 @@ static void ch341_set_termios(struct tty_struct *tty,

priv->baud_rate = baud_rate;

- ctrl = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX | CH341_LCR_CS8;
+ ctrl = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX;
+
+ switch (cflag & CSIZE) {
+ case CS5:
+ ctrl |= CH341_LCR_CS5;
+ break;
+ case CS6:
+ ctrl |= CH341_LCR_CS6;
+ break;
+ case CS7:
+ ctrl |= CH341_LCR_CS7;
+ break;
+ case CS8:
+ default:
+ ctrl |= CH341_LCR_CS8;
+ break;
+ }
+
+ if (cflag & PARENB) {
+ ctrl |= CH341_LCR_ENABLE_PAR;
+ if ((cflag & PARODD) == 0)
+ ctrl |= CH341_LCR_PAR_EVEN;
+ }
+
+ if (cflag & CMSPAR)
+ ctrl |= CH341_LCR_MARK_SPACE;
+
+ if (cflag & CSTOPB)
+ ctrl |= CH341_LCR_STOP_BITS_2;

if (baud_rate) {
spin_lock_irqsave(&priv->lock, flags);
@@ -373,11 +402,6 @@ static void ch341_set_termios(struct tty_struct *tty,

ch341_set_handshake(port->serial->dev, priv->line_control);

- /* Unimplemented:
- * (cflag & CSIZE) : data bits [5, 8]
- * (cflag & PARENB) : parity {NONE, EVEN, ODD}
- * (cflag & CSTOPB) : stop bits [1, 2]
- */
}

static void ch341_break_ctl(struct tty_struct *tty, int break_state)
--
1.9.1
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