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    Subject[tip:x86/cpu] x86/cpufeature: Remove cpu_has_clflush
    Commit-ID:  906bf7fda2c9cf5c1762ec607943ed54b6c5b203
    Gitweb: http://git.kernel.org/tip/906bf7fda2c9cf5c1762ec607943ed54b6c5b203
    Author: Borislav Petkov <bp@suse.de>
    AuthorDate: Tue, 29 Mar 2016 17:41:59 +0200
    Committer: Ingo Molnar <mingo@kernel.org>
    CommitDate: Thu, 31 Mar 2016 13:35:09 +0200

    x86/cpufeature: Remove cpu_has_clflush

    Use the fast variant in the DRM code.

    Signed-off-by: Borislav Petkov <bp@suse.de>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: dri-devel@lists.freedesktop.org
    Cc: intel-gfx@lists.freedesktop.org
    Link: http://lkml.kernel.org/r/1459266123-21878-7-git-send-email-bp@alien8.de
    Signed-off-by: Ingo Molnar <mingo@kernel.org>
    ---
    arch/x86/include/asm/cpufeature.h | 1 -
    arch/x86/kernel/cpu/intel.c | 2 +-
    arch/x86/kernel/tce_64.c | 2 +-
    arch/x86/mm/pageattr.c | 2 +-
    drivers/gpu/drm/drm_cache.c | 6 +++---
    drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
    6 files changed, 7 insertions(+), 8 deletions(-)

    diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
    index 693b4aa..a751542 100644
    --- a/arch/x86/include/asm/cpufeature.h
    +++ b/arch/x86/include/asm/cpufeature.h
    @@ -129,7 +129,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
    #define cpu_has_aes boot_cpu_has(X86_FEATURE_AES)
    #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX)
    #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
    -#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
    #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
    #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
    #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
    diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
    index 1f7fdb9..628a9f8 100644
    --- a/arch/x86/kernel/cpu/intel.c
    +++ b/arch/x86/kernel/cpu/intel.c
    @@ -468,7 +468,7 @@ static void init_intel(struct cpuinfo_x86 *c)
    set_cpu_cap(c, X86_FEATURE_PEBS);
    }

    - if (c->x86 == 6 && cpu_has_clflush &&
    + if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) &&
    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
    set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);

    diff --git a/arch/x86/kernel/tce_64.c b/arch/x86/kernel/tce_64.c
    index ab40954..f386bad 100644
    --- a/arch/x86/kernel/tce_64.c
    +++ b/arch/x86/kernel/tce_64.c
    @@ -40,7 +40,7 @@
    static inline void flush_tce(void* tceaddr)
    {
    /* a single tce can't cross a cache line */
    - if (cpu_has_clflush)
    + if (boot_cpu_has(X86_FEATURE_CLFLUSH))
    clflush(tceaddr);
    else
    wbinvd();
    diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
    index fb20c2e..bbf462f 100644
    --- a/arch/x86/mm/pageattr.c
    +++ b/arch/x86/mm/pageattr.c
    @@ -1460,7 +1460,7 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
    * error case we fall back to cpa_flush_all (which uses
    * WBINVD):
    */
    - if (!ret && cpu_has_clflush) {
    + if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
    if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
    cpa_flush_array(addr, numpages, cache,
    cpa.flags, pages);
    diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
    index 6743ff7..059f7c3 100644
    --- a/drivers/gpu/drm/drm_cache.c
    +++ b/drivers/gpu/drm/drm_cache.c
    @@ -72,7 +72,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
    {

    #if defined(CONFIG_X86)
    - if (cpu_has_clflush) {
    + if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
    drm_cache_flush_clflush(pages, num_pages);
    return;
    }
    @@ -105,7 +105,7 @@ void
    drm_clflush_sg(struct sg_table *st)
    {
    #if defined(CONFIG_X86)
    - if (cpu_has_clflush) {
    + if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
    struct sg_page_iter sg_iter;

    mb();
    @@ -129,7 +129,7 @@ void
    drm_clflush_virt_range(void *addr, unsigned long length)
    {
    #if defined(CONFIG_X86)
    - if (cpu_has_clflush) {
    + if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
    const int size = boot_cpu_data.x86_clflush_size;
    void *end = addr + length;
    addr = (void *)(((unsigned long)addr) & -size);
    diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
    index 1328bc5..b845f46 100644
    --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
    +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
    @@ -488,7 +488,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
    ret = relocate_entry_cpu(obj, reloc, target_offset);
    else if (obj->map_and_fenceable)
    ret = relocate_entry_gtt(obj, reloc, target_offset);
    - else if (cpu_has_clflush)
    + else if (static_cpu_has(X86_FEATURE_CLFLUSH))
    ret = relocate_entry_clflush(obj, reloc, target_offset);
    else {
    WARN_ONCE(1, "Impossible case in relocation handling\n");
    \
     
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