Messages in this thread | | | From | Alexander Stein <> | Subject | Re: [PATCH] regmap: mmio: Fix value endianness selection | Date | Tue, 29 Mar 2016 08:10:18 +0200 |
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On Friday 25 March 2016 11:24:59, Mark Brown wrote: > On Wed, Mar 23, 2016 at 03:20:46PM +0100, Alexander Stein wrote: > > The difference in those drivers is that syscon manually sets > > config.val_format_endian before calling regmap_init_mmio. > > spi-fsl-dspi does not. I guess this driver relies on this configuration > > being done in regmap_get_val_endian. But this is never reached because > > after setting > Does this IP exist in configurations where it is anything other than big > endian? If not then this probably shouldn't be in DT.
AFAIK it is included once or twice in the VFxxx series. CC'ed Stefan Agner for confirmation. Stefan: Is the DCU on VFxxx attached little-endian, e.g. no byte swapping needed when accessing the periphery?
Best regards, Alexander
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