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SubjectRe: [PATCH 4/6] pwm: pwm-lpc18xx-sct: test clock rate to avoid division by 0
On Wed, Mar 02, 2016 at 11:44:02PM +0100, Joachim Eastwood wrote:
> Hi Wolfram,
>
> On 2 March 2016 at 23:33, Wolfram Sang <wsa@the-dreams.de> wrote:
> > From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> >
> > The clk API may return 0 on clk_get_rate, so we should check the result before
> > using it as a divisor.
> >
> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > ---
> >
> > Should go individually via subsystem tree.
> >
> > drivers/pwm/pwm-lpc18xx-sct.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/pwm/pwm-lpc18xx-sct.c b/drivers/pwm/pwm-lpc18xx-sct.c
> > index 9163085101bc94..6487962c355c03 100644
> > --- a/drivers/pwm/pwm-lpc18xx-sct.c
> > +++ b/drivers/pwm/pwm-lpc18xx-sct.c
> > @@ -360,6 +360,8 @@ static int lpc18xx_pwm_probe(struct platform_device *pdev)
> > }
> >
> > lpc18xx_pwm->clk_rate = clk_get_rate(lpc18xx_pwm->pwm_clk);
> > + if (!lpc18xx_pwm->clk_rate)
> > + return -EINVAL;
>
> This needs to be:
> if (!lpc18xx_pwm->clk_rate) {
> ret = -EINVAL;
> goto disable_pwmclk;
> }

Yes, that slipped through. Thanks!

> I would also prefer an explicit check against 0 here. ie.:

Well, I like the reading "if not rate then error"

Will send V2 now...

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