Messages in this thread | | | Subject | Re: [PATCH] link up validation moved to pcie-designware | From | Joao Pinto <> | Date | Mon, 8 Feb 2016 16:48:07 +0000 |
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Our
On 2/8/2016 4:46 PM, Arnd Bergmann wrote: > On Monday 08 February 2016 16:43:33 Joao Pinto wrote: >> Hi, >> Ok, so what should be the retries and waiting time in your opinion? >> The most typical is: >> >> retries: 10 >> delay: 100ms (usleep_range (90000, 100000)) >> >> These values should be ok? >> >> I am already testing a full pcie-designware platform driver. >> >> > You are the one with the datasheet, not me. ;-)
Our reference driver follows the 10x with 100ms delay between retries, so lets follow that value. Agree?
> > Arnd >
Joao
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