Messages in this thread | | | Date | Wed, 17 Feb 2016 19:16:54 +0100 (CET) | From | Thomas Gleixner <> | Subject | RE: [patch 04/11] x86/perf/intel_uncore: Cleanup hardware on exit |
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On Wed, 17 Feb 2016, Liang, Kan wrote: > > When tearing down the boxes nothing undoes the hardware state which > > was setup by box->init_box(). Add a box->exit_box() callback and > > implement it for the uncores which have an init_box() callback. > > I don't think we need exit_box. > Because in disable_box we already freezes the box.
init_box() != enable_box() exit_box() != disable_box()
And we certainly want to clear stuff which enables things at a different msr/config word location than what you do with the enable/disable callbacks.
I'm not a fan of leaving hardware in some random state.
> Also, writing 0 cannot clear hardware state. It will unfreeze the box. > The counter will start to count.
Nonsense.
> > @@ -201,6 +201,11 @@ static void nhmex_uncore_msr_init_box(st > > wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, > > NHMEX_U_PMON_GLOBAL_EN_ALL); }
> > +static void nhmex_uncore_msr_exit_box(struct intel_uncore_box *box) > > { > > + wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, 0); }
The reset value for this register is 0. So how is that wrong?
> > +static void snb_uncore_msr_exit_box(struct intel_uncore_box *box) { > > + if (box->pmu->pmu_idx == 0) > > + wrmsrl(SNB_UNC_PERF_GLOBAL_CTL, 0); > > +}
Ditto.
> > +static void snb_uncore_imc_exit_box(struct intel_uncore_box *box) { > > + iounmap(box->io_addr);
That's definitely required, because it would leak a mapping.
I know Intel folks do not care about error handling and a few reference leaks, but I care very much.
If there is a single instance of exit_box() in that patch which flips the wrong bits, then please point it out with the proper reference in the manual and not with such half baken statements as above.
Thanks,
tglx
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