Messages in this thread Patch in this message | | | Date | Fri, 12 Feb 2016 20:33:53 +0100 | From | Borislav Petkov <> | Subject | Re: [PART1 RFC 6/9] svm: Add interrupt injection via AVIC |
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On Fri, Feb 12, 2016 at 07:56:59PM +0100, Paolo Bonzini wrote: > Ok, next examples: MSR_VM_CR and MSR_VM_IGNNE. :)
I knew you were going to dig out some. :-)
> Are you okay with moving all the SVM MSRs to virtext.h instead?
So I would not move any now and cause unnecessary churn. I think it should be enough if we agree on a strategy wrt msr-index.h and then follow it. I think we should do something similar to pci_ids.h.
Let me add tip guys to CC.
--- diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 552346598dab..75a5bb61d32f 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1,7 +1,12 @@ #ifndef _ASM_X86_MSR_INDEX_H #define _ASM_X86_MSR_INDEX_H -/* CPU model specific register (MSR) numbers */ +/* + * CPU model specific register (MSR) numbers. + * + * Do not add new entries to this file unless the definitions are shared + * between multiple compilation units. + */ /* x86-64 specific MSRs */ #define MSR_EFER 0xc0000080 /* extended feature register */
-- Regards/Gruss, Boris.
ECO tip #101: Trim your mails when you reply.
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