Messages in this thread | | | From | Andy Lutomirski <> | Date | Fri, 23 Dec 2016 17:58:36 -0800 | Subject | Re: [v2 2/7] x86/mpx: Fail when implicit zero-displacement is used along with R/EBP |
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On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri <ricardo.neri-calderon@linux.intel.com> wrote: > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > Developer's Manual volume 2A states that when memory addressing with no > explicit displacement (i.e, mod part of ModR/M is 0), a SIB byte is used > and the base of the SIB byte points to (R/EBP) (i.e., base = 5), an > explicit displacement of 0 must be used. > > Make the address decoder to return -EINVAL in such a case. > > Cc: Dave Hansen <dave.hansen@linux.intel.com> > Cc: Adam Buchbinder <adam.buchbinder@gmail.com> > Cc: Colin Ian King <colin.king@canonical.com> > Cc: Lorenzo Stoakes <lstoakes@gmail.com> > Cc: Qiaowei Ren <qiaowei.ren@intel.com> > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com> > Cc: x86@kernel.org > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> > --- > arch/x86/mm/mpx.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c > index 6a75a75..71681d0 100644 > --- a/arch/x86/mm/mpx.c > +++ b/arch/x86/mm/mpx.c > @@ -120,6 +120,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs, > > case REG_TYPE_BASE: > regno = X86_SIB_BASE(insn->sib.value); > + if (regno == 5 && X86_MODRM_RM(insn->modrm.value) == 0) { > + WARN_ONCE(1, "An explicit displacement is required when %sBP used as SIB base.", > + (IS_ENABLED(CONFIG_X86_64) && insn->x86_64) ? > + "R13 or R" : "E"); > + return -EINVAL; > + } > +
Now that I've read the cover letter, I see what's going on. This should not warn -- user code can easily trigger this deliberately.
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